1. Field of the Invention
The present invention relates to a circuit and method for the conversion of digital signals to analog signals (digital-to-analog converter, D-to-A converter, or "DAC"). More particularly, the present invention relates to a DAC that provides high accuracy, linearity, and monotonicity by mirroring currents in a circuit. The present invention includes the use of a master device connected in parallel to a plurality of binary (digital)-weighted devices that are turned on and off by the binary signals to be converted. The system of the present invention provides current outputs that correspond to the particular binary signals received. These "weighted-current" outputs are delivered so that an analog output voltage is developed that is proportional to the number corresponding to the digital signal at the input. The present invention can be fabricated using semiconductor fabrication steps already in use.
2. Description of the Prior Art
DACs are used in a wide variety of applications. They have long been used to translate logic signal inputs into corresponding analog signal outputs. They are used in oscilloscopes, computer-controlled devices, and other equipment requiring analog/digital interfacing devices. In effect, a DAC operates by linking a plurality of parallel circuit lines together such that when one of the lines is switched "on" by a digital input signal, current is delivered through the line into a node that can be defined as a current summing node. That is, the current summing node is the common output node for the parallel lines. The summed current--an analog signal--is then translated by well known conversion means into an output voltage which is the analog voltage output. (Of course, the output can be an analog current output as well.) The parallel circuit lines are usually coupled to a common high-potential power rail, and each has a distinct impedance. As a result, each of the parallel lines provides a distinct current to the common current output node, corresponding to the digital input signal used to turn that particular line on.
In general, DACs can be categorized by their speed of operation: those that are "high" speed and those that are "low" speed. E.g., high-speed DACs are required for video applications, where the conversion must occur rapidly in order to provide a smooth display of moving figures. In contrast, low-speed DACs maybe used in compact disk drives, where a minimal delay in conversion will not affect output. In those DAC applications which do not require high-speed conversion, acceptance of a small delay in conversion can permit the use of relatively simple, highly accurate, and extremely reliable DACs that can be implemented in modern semiconductor fabrication processes. In both types it is desirable to have monotonicity; that is, to have the DAC output increase for any increase in the number corresponding to the digital input over the entire range of operation. It is also desirable to have a DAC that provides a straight-line translation from digital input to voltage output; that is, linearity. Further, it is desirable to have a DAC that minimizes the noise problems associated with prior DACs.
A number of prior semiconductor DACs were operated through the use of voltage- or capacitor-scaling techniques. In voltage-scaling conversion, a voltage tap line is placed between each resistor in a series of equivalent resistors, with each tap line having a switch controlled by a binary input signal corresponding to a particular bit number. The number of resistors in the series is dependent upon the size of the bit number. Thus, for an eight-bit voltage-scaling DAC, there would have to be 2.sup.8 or 256 resistors. An advantage of the voltage-scaling DAC is that it provides monotonicity. This is because the voltage at a particular "tap" cannot be less than the voltage associated with the subsequent tap and so there is no drop in the resultant output voltage as the digital input value increases. A disadvantage of a voltage-scaling device fabricated using semiconductor components is that the circuitry involved exhibits problems in conversion speed. Specifically, each internal node of the circuit gives rise to a particular parasitic capacitance such that each line is not simply resistive. The RC time constants associated with these parasitic capacitances are difficult to control under present semiconductor fabrication techniques in a way that yields accurate, reliable DACs.
Capacitor-scaling DACs involve the use of a plurality of capacitors connected in parallel with binary inputs that control the switches of individual capacitor lines. Each of the capacitors of the DAC has a unique capacitance in relation to the other capacitors of the device so that a particular capacitance line outputs a unique charging current. Switch connections divide the potential applied to the entire capacitor array as a function of digital input. As a result, only one capacitor line is conducting at a time. A selected capacitor line of the array having a unique capacitance, provides a unique current to a current summing point that is translated into an output voltage corresponding to the digital input signal.
A significant problem associated with the capacitor-scaling method is that the ratio between the capacitance of the capacitor corresponding to the least significant bit (00000001 or "1" in an eight-bit DAC) and the capacitance of the capacitor corresponding to the most significant bit (10000000 or "128" in the eight-bit DAC) must be extremely large in order to develop sufficient differences in the current outputs related to particular digital inputs. The large capacitance differences required in suitable DACs of this type are very difficult to produce in the very small layouts of present semiconductor devices, particularly since a minimum capacitance is required in order to generate a significant current for the least significant bit. In the field of semiconductor technology the ability to reliably produce such capacitances, given the parasitic capacitances associated with semiconductor devices, in the ratios required is extremely difficult. As a result, capacitor-scaling DACs are relatively inaccurate.
Therefore, what is needed is a digital-to-analog converter that provides monotonicity, linearity, and accuracy. What is also needed is a DAC that avoids the problems associated with the prior voltage-scaling and current-scaling devices of the prior art, in particular the problems associated with parasitic capacitances, including conversion delays and inaccuracy. Further, what is needed is a DAC that exhibits the noted attributes of monotonicity, linearity, and accuracy, and that can be fabricated utilizing present semiconductor device fabrication techniques. Yet further, what is needed is a DAC that minimizes the noise associated with switching and other changes in the operation of the device.